Apresentação
Convidada Empresarial
Título/Title:
MIPS IP cores and the SEAD-3 FPGA-based development platform and tools
Orador/Presenter: Chris
Berg
(MIPS Technologies)
Resumo/Abstract
MIPS Technologies is a
leading provider of
industry-standard
processor architectures and cores that power some of the world's most
popular products for the home entertainment, communications, networking
and portable multimedia markets. MIPS cores are highly configurable and
offer customers the option of adding new instructions to the base
architecture through a feature called CorExtend. All cores are
synthesizable and can be deployed on an FPGA platform for case studies
or prototype development. MIPS' SEAD-3 FPGA based SoC development
platform is a new board that complements the company's software tools,
System Navigator probes and simulators. This presentation will discuss
the SEAD-3 board in-depth, explaining how engineers can leverage it for
hardware development and SoC evaluation.
Biografia Resumida do
Orador/Presenter's Bio
Chris
Berg is a Solutions Architect
at MIPS Technologies. He joined
MIPS in December of 2000. He is responsible for the technical
relationships to customers in Europe, Israel and India. He is leading
system level and core specific discussions to help leverage the
performance of MIPS cores in new SoC designs. Chris studied Physics at
the University of Bonn, Germany, and graduated with a Diploma on
particle detector chips for the Atlas detector at the LHC accelerator
at CERN. He has worked as a RTL designer at Infineon prior to his
position at MIPS.
Apoios e
Patrocínios
Organização
